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In their recent study, Strategy Analytics forecasted a $9.2B shortfall in backhaul investments by 2017. That figure represents the difference between planned and actual required investments to sustain exponentially increasing data traffic generated by the plethora of mobile smart devices. Backhaul already is and will be even more critical for provisioning user satisfaction in view of thousands of small cells being connected to the macro grid and escalating further demand for a bandwidth. In the wireless backhaul domain, this has caused a race towards ever increasing modulation rates to achieve the highest rail on the spectrum efficiency ladder. However, increasing the modulation rates is not a simple solution to the problem, which has a root in existing network architectures and has to sustain evolution in the most OpEx and CaPex friendly way. Moving from the industry standard 256QAM to 1024QAM or even higher modulations is not feasible if the underlying system is not designed for it. Each next modulation step requires additional 3dB of improvement in link budget. In analog domain this may come from doubling power output at the transmitter or higher antenna gain. Higher antenna gain is not a desirable route as operators’ OpEx is tied to antenna size and weight. Larger antennas entail higher purchase and installation cost. Increasing transmit power may be a solution to consider, but it also comes with a trade-off between cost and required improvements in terms of power amplifier linearity, phase noise and heat dissipation. These challenges can be effectively tackled in the digital domain. Use of more capable forward error correction techniques, which result in better received signal levels, has been one approach so far to support migration towards higher order modulations. Another approach used less in point-to-point wireless backhaul is digital pre-distortion, which linearizes power amplifier (PA) characteristics. The linearization results in gains from power back-off needed for operating a certain QAM level and in turn can be effectively used for stepping up in modulation level.  The PAs have non-linear properties which, dominate near saturation region. The non-linearity of the PA can be characterized by various parameters. Important among them are:  

•   Third Order Intercept Point: the Third Order Intercept Point is defined as the point at which third order intermodulation products overtake the desired first order component
•   1dB Compression point: the 1dB Compression point is defined as the point at which the output of an amplifier has dropped 1 dB below the ideal linear output
•   Saturation point: saturation point is the point where maximum input power is exceeded. At this point, the output is clipped to a maximum voltage resulting in gain compression until maximum power is achieved.

The distance in decibels between the average input power and the saturated input power is called the back-off. The location of this point is depended upon the characteristic of amplifier and modulation. The distortion caused by non-linearity of PA can be divided into two main types:

•   AM/AM distortion: the AM/AM distortion is created by variation in the gain of amplifier across different input powers
•   AM/PM distortion: the AM/PM distortion is a change in the phase between the input and output signal of the amplifier

For the pre-distortion algorithm to be effective, the key element is to have a good model to capture the non-linearity effects in the PA. An amplifier linearization is done usually by applying inverse of non-linear transfer function called pre-distortion. These non-linear transfer functions can be measured or approximated. Adaptive algorithm could also be used to converge to the proper coefficients for non-linearity and to do polynomial approximation. For instance, a different polynomial can be devised as an approximate inverse, if it is not possible to design the exact inverse of the polynomial. The Digital Pre-Distortion (DPD) algorithm implemented in Xilinx field programmable gate array (FPGA)-based point-to-point wireless backhaul modems is referred to as Hardware embedded Adaptive Digital Pre-Distortion. The receiver part of the modem contains residual AM/AM and AM/PM estimators, while the transmitter part includes processing and correction blocks where inverse non-linear transfer function is calculated and applied to the output signal. The closed loop adaptive DPD algorithm is depicted below (Figure 1). In DPD scheme, the signal has to go through the pre-distorter before passing through the PA.[[wysiwyg_imageupload:917:]]Distortion Detection Block receives the data/information from Decision Block and using proprietary algorithm calculates the residual AM/AM and AM/PM levels in the received symbols continuously. The ACM block on the Receiver part receives the estimated AM/AM and AM/PM values and sends them to the ACM block in the transmitter part through highly protected service channel. The Receiver’s ACM block transfers the AM/AM and AM/PM values to Processing block after decoding. Processing block calculates argument of inverse non-linear distortion function separately.  The performance of the Adaptive Digital Pre-Distortion is evaluated based on the measurements of direct link fading margin with different RF systems. In the race of higher order modulations, efficient PA design can fill 3db intermodulation step to migrate to the next modulation level, thereby permitting higher spectrum efficiency and data throughput than otherwise possible. If the shift to higher modulation order is not desired, then this gain can be used to reduce power consumption to optimize the cost of PA. Other advantages of the adaptive DPD give effect to the reduction in adjacent channel emission or out-of-band distortion, a reduction of in-band distortion, and an increase in power efficiency and consequently increase in direct link fade margin. By way of background, Xilinx is using Adaptive DPD in a 1024QAM point-to-point microwave modem IP solution, which is independent of any particular type of PA used. The design is fully hardware embedded, so it does not require software-based intervention from a CPU subsystem. The high-capacity Gigabit class microwave modem IP is available on Xilinx® s Artix®-7 and Kintex®-7 FPGAs and Zynq®-7000 All Programmable SoCs.来源：EDN