以下是FSMC-SRAM模式下的初始化代码，分享的同时，希望对你有用。
/* Private typedef -----------------------------------------------------------*/typedef struct{ vu16 LCD_REG; vu16 LCD_RAM;} LCD_TypeDef;#define LCD_WriteCmd(cmd) LCD->LCD_REG = cmd#define LCD_WriteData(data) LCD->LCD_RAM = data/* LCD is connected to the FSMC_Bank1_NOR/SRAM4 and NE4 is used as ship select signal */#define LCD_BASE ((u32)(0x60000000 | 0x0C000000))#define LCD ((LCD_TypeDef *) LCD_BASE)void LCD_FSMCConfig(void){ FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDef p;/*-- FSMC Configuration ------------------------------------------------------*//*----------------------- SRAM Bank 4 ----------------------------------------*/ /* FSMC_Bank1_NORSRAM4 configuration */ //标准// p.FSMC_AddressSetupTime = 1;// p.FSMC_AddressHoldTime = 2;// p.FSMC_DataSetupTime = 2; // p.FSMC_BusTurnAroundDuration = 1;// p.FSMC_CLKDivision = 1;// p.FSMC_DataLatency = 2; //超快 p.FSMC_AddressSetupTime = 0; p.FSMC_AddressHoldTime = 0; p.FSMC_DataSetupTime = 1; p.FSMC_BusTurnAroundDuration = 0; p.FSMC_CLKDivision = 0; p.FSMC_DataLatency = 0; p.FSMC_AccessMode = FSMC_AccessMode_A; /* Color LCD configuration ------------------------------------ LCD configured as follow: - Data/Address MUX = Disable - Memory Type = SRAM - Data Width = 16bit - Write Operation = Enable - Extended Mode = Enable - Asynchronous Wait = Disable */ FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; //2.0 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); /* BANK 4 (of NOR/SRAM Bank 1~4) is enabled */ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);} |
