| 主题：採用內置於FPGA中的軟核CPU來加速嵌入式系統設計 |
| 在线问答： |
| [问：王又新] |
在你的投影片中 Altera 提供的IP free or charge? |
| [答：Altera Expert] |
Some free and some chsrge |
[2005-3-15 10:31:24] |
| [问：johnli] |
軟核要交lisence費用嗎？ |
| [答：Altera Expert] |
For NIOS / II, license is included with the NIOS / II development kit,
one license per kit. There is no additional license for production
run as long as the customer is using Altera NIOS / II kit. |
[2005-3-15 10:33:12] |
| [问：bear305] |
請問用貴公司的FPGA晶片實現的軟CPU的頻率最高可達到多少？ |
| [答：Altera Expert] |
Nios II 应用到Stratix II最快的器件中，速度可达180MHz |
[2005-3-15 10:34:39] |
| [问：bswangcc] |
请问掌握內置於FPGA中的軟核CPU來加速嵌入式系統設計这项技术需要哪些软硬件技术背景？ |
| [答：Altera Expert] |
1)需要FPGA/CPLD设计经验，掌握一种设计语言，推荐VHDL或Verilog。
2）有基本的嵌入式系统设计经验，熟悉C语言编程。
3）对CPU系统的硬件结构熟悉。 |
[2005-3-15 10:37:26] |
| [问：robin] |
请问Nios II要求的FPGA芯片的容量至少是多少？在选芯片时候有什么要求吗？ |
| [答：Altera Expert] |
有三种档次的Nios II CPU，最经济、性能相对较低的配置只需要600个左右的逻辑单元。Nios II支持Cyclone、CycloneII，Stratix，和StratixII
器件。 |
[2005-3-15 10:39:58] |
| [问：frankwang5168] |
您好,
目前我對於Quartus的經驗僅止於一般邏輯的應用, 並未學習過將CPU嵌入至FPGA內. 請問我該怎樣學習將CPU嵌入至FPGA內? 以及該購買的開發套件為何?
謝謝. |
| [答：Altera Expert] |
The best way is to purchase one set of NIOS development kit to start
with. If you need any technical support, you may contact Altera
or their local distributor. You may buy the kits from local
Altera distributor. |
[2005-3-15 10:40:27] |
| [问：robin] |
我之前研究的是Nios，现想要转向NiosII，请问硬件配置以及编程软件方面有什么区别，我需要做那些工作？ |
| [答：Altera Expert] |
硬件基本上没有什么变化，CPU架构完全相同，还是采用SOPC Builder来搭建系统。软件方面采用了全新的集成软件开发系统IDE，更加方便。你需要了解IDE的使用方法。 |
[2005-3-15 10:42:03] |
| [问：robin] |
我在NiosII的SDK shell下运行nios-build，结果出现nios-elf-gcc:Command
not found.
难道niosII的SDK shell下没有装nios-elf-gcc工具吗，怎么安装。
我用的是串口。 |
| [答：Altera Expert] |
估计你的安装有问题。SDK shell下是可以运行nb指令的。请到mysupport.altera.com上将你的问题发给Altera的工程师，他们会指导您如何使用。 |
[2005-3-15 10:44:57] |
| [问：hitjzm] |
在FPGA上能實現多個處理器，這多個處理器是並行工作的麼 |
| [答：Altera Expert] |
可以使用多個處理器,並可同時工作 |
[2005-3-15 10:45:04] |
| [问：zhanglingxi] |
我想通过用户自定义指令完成快速傅立叶变化的算法，不知可行否 |
| [答：Altera Expert] |
可以。不过你得自己设计一个VHDL/Verilog模块，用硬件电路实现傅立叶变换，然后做为定制指令旁路在CPU的ALU旁边。 |
[2005-3-15 10:47:06] |
| [问：w7612] |
現在我們的設計一般基於AMBA 2.0總路設計IP，對於AVAALON匯流排和AMBA匯流排有什麼好的辦法進行交換 |
| [答：Altera Expert] |
可利用SOPC Builder裡面的AHB to Avalon Bridge |
[2005-3-15 10:47:55] |
| [问：tlyangbenq] |
NIOS II軟核處理器和通常的硬核處理器有何不同和優點? |
| [答：Altera Expert] |
软核主要是指我们的NIOSII时可配置的，可根据客户需要对功能模块进行裁减，非常灵活，而硬核处理器是固定的 |
[2005-3-15 10:48:17] |
| [问：m9002008] |
在進行FPGA設計時,如何避免時序的衝突問題?如何確定時序? |
| [答：Altera Expert] |
透過quartus 2 的signal tabII or 外拉signal測試FPGA 內部timing是否正確 |
[2005-3-15 10:48:58] |
| [问：jasonfuaa] |
Nios II是否支援內部多電源系統？能提供幾種電源電壓? |
| [答：Altera Expert] |
THE Nios II IS SOFTWARE PACKAGE. So no multi-voltage issue. |
[2005-3-15 10:53:42] |
| [问：ldrsxq] |
在pcb板設計過程中，怎樣提高fpga的抗干擾能力。謝謝 |
| [答：Altera Expert] |
一搬來說FPGA PCB設計流程和一般PCB差不多,但在高速設計時當然要考慮到一些問題,例如Stratix II有一份High Speed
Layout Guildelines可參考(http://www.altera.com/literature/hb/stx2
/stx2_sii52012.pdf) |
[2005-3-15 10:54:34] |
| [问：王又新] |
In transparency, one architecutre is multi-masters
communicating by multi-arbiters. Is the architecture real desgin or just
a idea? |
| [答：Altera Expert] |
Of course, it is a real design. Avalon is a multi-master architecutre,
Slave-side arbitration logic inside the Avalon bus module arbitrates conflicts
when multiple master peripherals attempt to access the Altera Experte slave peripheral
at the Altera Experte time |
[2005-3-15 10:57:04] |
| [问：fwdelta] |
進行FPGA設計，經常需要向其他晶片提供時鐘，這時將會有提供時鐘反饋的問題,有沒有較好的方法？ |
| [答：Altera Expert] |
I think you must discuss the issue face to face with FAE. |
[2005-3-15 10:59:50] |
| [问：willing] |
在做nois開發時除了使用quartus之外，還需要什麼開發工具？ |
| [答：Altera Expert] |
No. THE Qusrtus II IS THE BEST DEVELOPMENT TOOLS. |
[2005-3-15 11:00:47] |
| [问：minhead] |
軟核的指令系統是規定好的，能否自己定義的擴展嗎？ |
| [答：Altera Expert] |
No. |
[2005-3-15 11:02:11] |
| [问：m9002008] |
FPGA中的時序設計如何進行驗證?它的成功率大約有多少?和實測會有多大差別? |
| [答：Altera Expert] |
Dear Sir, 本上Quartus II即可做Timing Analy來達到時序分析,基本上應該都不會有問題,但先決條件是要提供正確的Timing
constrain |
[2005-3-15 11:02:29] |
| [问：jasonfuaa] |
Nios 指令集有何特點？在此指令集中那些操作用的時間較短，那些指令用時較長？ |
| [答：Altera Expert] |
Features:
1.Full 32-bit instruction set
2.Single-instruction 32 × 32 multiply and divide producing a 32-bit result
3.Dedicated instructions for computing 64-bit and 128-bit products of
multiplication
4.Single-instruction barrel shifter
5.Instruction set architecture (ISA) compatible across all Nios II processor
systems
6.custom instructions
Long OP:
Data Transfer instruction, shift/rotate, multicycle custom instruction
Short OP:
Others (eg. branch, add, break, ret.. ) |
[2005-3-15 11:03:09] |
| [问：marron] |
有沒有在PWM控制方面的應用案例，請講解 |
| [答：Altera Expert] |
PWM can be used to do motor control |
[2005-3-15 11:05:33] |
| [问：teamtop] |
Do you have any training program for new user
? |
| [答：Altera Expert] |
You can go to http://www.gfec.com.tw/news/index.htm
But it is in Taiwan. |
[2005-3-15 11:05:49] |
| [问：huagel] |
請問現在最新的niosII是哪個版本，比較以前版本有哪些改進？ |
| [答：Altera Expert] |
最新版本是NIOSII1.1版，相对以前的版本有很大改善，具体的你可以到ALTERA上找到很多相关资料 |
[2005-3-15 11:08:44] |
| [问：ty010496] |
Nois II架構中是否有單獨的指令和資料匯流排?寬度幾位?速度有多快? |
| [答：Altera Expert] |
最好是利用Customer instruction來制定單獨自己的指令 |
[2005-3-15 11:08:48] |
| [问：doomdoom] |
我對於CPU不是很懂行，請問這個軟核是可以到處移植嗎？在QUARTUS 中能有比較直觀的介面
顯得象個實體嗎？ |
| [答：Altera Expert] |
The NIOS2 can be implemented in Altera FPGA Stratix/II, Cyclone/II,
APEX20K. In Quartus4.2, you can use SOPC to generate NIOS system symbol
and HDL codes for plug-in your schematics or RTL. |
[2005-3-15 11:09:22] |
| [问：flutter0423] |
如果不用AS模式進行掉電保護，沒有太大影響吧 |
| [答：Altera Expert] |
What"s the "掉電"? Please write it again in English. Moreover, maybe submit
your question and discuss your question with our FAE. |
[2005-3-15 11:12:39] |
| [问：jasonfuaa] |
Nios II中的PLL是類比的還是數位的，能否處理時鐘抖動?效果如何？ |
| [答：Altera Expert] |
is digital,
every device have different range about pll clock jitter.
if your device target is cyclon ,so Period jitter for external clock
output is ±300ps.
you can check device handbook,page 4-32. |
[2005-3-15 11:13:35] |
| [问：wmjk2004] |
怎樣獲得後面介紹的開發工具？ |
| [答：Altera Expert] |
You can contact local Altera distributor and their FAEs to arrange the
development kits. Usually you may need to purchase one set
of NIOS development system which includes all the necessary software and
tools. |
[2005-3-15 11:13:45] |
| [问：lxmlxmlxm] |
請問哪里能找到Nios 2的user guide?請問quartus4.2有免費版的嗎?謝謝 |
| [答：Altera Expert] |
你可以在altera.com下載到所需要的文件
Nios 2 Handbook
http://www.altera.com/literature/lit-nio2.jsp
Quartus II web edition
http://www.altera.com/products/software/products
/quartus2web/sof-quarwebmain.html |
[2005-3-15 11:13:53] |
| [问：dumolin] |
我想知道FPGA上NiosII核的處理速度與通行的ARM9核處理處理速度如何比較，因為FPGA主頻一般也只有500MHz不到，而ARM9或PowerPC很容易上到600-900MHz的。謝謝！ |
| [答：Altera Expert] |
Performance can be measured in severval different ways. Frequency is
easier but makes less sense.
NIOSII can achieve upto 220DMIPS which can be better desribed its performance.
Also the custom logic and instruction can achieve even higher MFLOPS and
MMACS performances. |
[2005-3-15 11:14:35] |
| [问：chen.wei] |
在stratix II中NIOS II最快跑多快 |
| [答：Altera Expert] |
180Mhz and 220DMIPS. |
[2005-3-15 11:16:03] |
| [问：flutter0423] |
是不是只能在你們提供的IDE環境下開發c/c＋＋程式？ |
| [答：Altera Expert] |
你可以在很多环境下开发NIOS的程式，除了IDE外，你还可以用Code|Lab等我们的第三方的工具来开发NIOS程序 |
[2005-3-15 11:16:22] |
| [问：greg828] |
Nios II IDE包括有那幾部分?價格如何? |
| [答：Altera Expert] |
IDE is included in the NIOS development kit, with the evaluation board
together. We do not provide NIOS IDE separately. We
encourage our customers to purchase one set of NIOS development kit, which
also include one license of NIOS / II for production. |
[2005-3-15 11:18:07] |
| [问：shaohaitao2] |
如何產生8路時鐘：有的情況下是相位各差45度的8*125M時鐘，有時是兩兩相差180度的100M時鐘？ |
| [答：Altera Expert] |
You can configure the PLLs in Stratix/II to achieve various phases clocks. |
[2005-3-15 11:18:28] |
| [问：hugoshiuaa] |
其他公司的FPGA能否實現Nios II軟核處理器? |
| [答：Altera Expert] |
不行,因為Nios II 是基於Altera的FPGA, (Cyclone & Stratix)技術開發的. |
[2005-3-15 11:19:13] |
| [问：cyhwxm] |
开发的难易程度以及成本怎样?谢谢! |
| [答：Altera Expert] |
开发非常简单，和通用的CPU开发一样，成本比其他的CPU低，其本上你有我们的软件和JTAG下载电缆就可以进行基本的开发了 |
[2005-3-15 11:19:28] |
| [问：gsu] |
請問sopc builder，“legacy components”裏面的onchip
memery和“memory“裏面的 onchip memory有什麼區別? |
| [答：Altera Expert] |
The legacy on-chip memory keeps some parameters to configure for legacy
support like NIOS SDK and OCI/Germs. |
[2005-3-15 11:21:23] |
| [问：王又新] |
Is PCI IP free? |
| [答：Altera Expert] |
Altera PCI IP is not free. You need to purchase the license, you can
evalulate it for free. |
[2005-3-15 11:22:12] |
| [问：flutter] |
我想从nios研究转向NiosII，需要更换新的开发板和开发软件平台吗？ |
| [答：Altera Expert] |
开发板不需要换，但可能你需要更新你的软件平台 |
[2005-3-15 11:23:24] |
| [问：m9307232] |
對一般用戶而言，nios ii可以提供在系統有那些優點 |
| [答：Altera Expert] |
使用NIOS II最好的優點,就是User可以去自訂一顆自己所需的CPU,不像一般CPU規格都被定死 |
[2005-3-15 11:24:03] |
| [问：jasonfuaa] |
Nios II能配置幾種類型的處理器?我指的是ARM, MIPS, RISC, Zilog
或ZSP類型中那幾種? |
| [答：Altera Expert] |
NIOSII is different from the processors you indicated. Yet NIOSII can
work with them by proper connections such as Avalon to AHB bus and PCI
and other popular buses. |
[2005-3-15 11:24:22] |
| [问：hustwang] |
如果不用epc_controller,还有其他的方式在程序里面读写串行存储器EPCS1里面的内容吗？ |
| [答：Altera Expert] |
Unless you want to design your own epc_controller otherwise Altera epc_controller
is the best one to use. |
[2005-3-15 11:26:10] |
| [问：greg828] |
Nios II軟核處理器最佳的應用領域有那幾方面? |
| [答：Altera Expert] |
基本上幾乎都可以應用,但如果您的系統如果有用到一些數位設計,建議也一起放進FPGA,這樣也可減少您的成本 |
[2005-3-15 11:27:32] |
| [问：shizhixue] |
我是FPGA的初學者，應該怎樣入手 |
| [答：Altera Expert] |
Get a NIOS2 FPGA board and play and practise it;
you"ll learn a lot of stuff from it. |
[2005-3-15 11:27:39] |
| [问：flutter0423] |
現在有集成了類比外設的NIOS晶片嗎？ |
| [答：Altera Expert] |
目前沒有 |
[2005-3-15 11:27:51] |
| [问：fwdelta] |
Nios II的晶片對不同電壓的上電順序要求嚴格嗎？ |
| [答：Altera Expert] |
基本上應該是要參考FPGA的規格來決定 |
[2005-3-15 11:29:18] |
| [问：huangsp] |
我們目前在用STRATIX 1S20 做產品總體上認為工具鏈還可以,目前主要問題是,在自己的板上作程式下載時較麻煩.希望ALTERA能在這方面作一些例子.特別是針對各種不同廠家的FLASH下載,能提供視覺化的將程式碼加LOADER. |
| [答：Altera Expert] |
altera provide ps mode to configuration for general flash, so you can
refence "configuration handbook" on page 2-16. |
[2005-3-15 11:29:33] |
| [问：greg828] |
用Altera那種FPGA能獲得最大性能價格比的Nios II處理器? |
| [答：Altera Expert] |
It depends on the surronding logic. Of course to get the
best price/performance, we would recommend cyclone / cyclone for volume
projects. |
[2005-3-15 11:30:14] |
| [问：ty010496] |
Nios II處理器核能提供那些運算?那些運算只能用硬體來完成? |
| [答：Altera Expert] |
NIOSII supports instruction such as ADD,SUB,MUL,DIV, ROTATE/SHIFT. You
can also implement MAC, CRC, Endian conversion by using custom instruction
or logics. |
[2005-3-15 11:30:44] |
| [问：hugoshiuaa] |
Nios II處理器支援那些作業系統? |
| [答：Altera Expert] |
Bulit-in IDE are uCOS/2, and ECOS and uClinux are ready for download.
ESOL and other uItron compliant RTOS are there. |
[2005-3-15 11:33:43] |
| [问：yufg324] |
我想瞭解更多NIOSII IDE 的使用方法，哪里可以找到 |
| [答：Altera Expert] |
you can go to altera web or go to altera distributorship(ex. galaxy)
take a NIOSII tranning material. |
[2005-3-15 11:37:04] |
| [问：ty010496] |
Nios II處理器的用戶指令能增加那些功能? |
| [答：Altera Expert] |
NIOS 只有5個 customer instruction
NIOS II可提供至250個customer instruction
customer instruction 可加快執行速度,因為User可自訂硬體並規劃成自己的指令集來控制 |
[2005-3-15 11:38:24] |
| [问：79685508] |
作為在校學生可以通過什麼途徑獲得noisII的開發技術。 |
| [答：Altera Expert] |
您可以通过参加Altera大学计划，以极其优惠的价格获得NiosII开发系统，开发板，和软件license |
[2005-3-15 11:38:36] |
| [问：leonqin] |
一個包含了基本TCPIP協議棧的ECOS2編譯後有多大 |
| [答：Altera Expert] |
我这里暂时没有这个数据，不过可以查到相关资料。您可以把这个问题发到mysupport.altera.com,Altera 的工程师可以给你这个数据。谢谢。 |
[2005-3-15 11:40:28] |
| [问：wenjialiang] |
如何得到開發套件，價格幾何？ |
| [答：Altera Expert] |
We encourage our customer to purchase one set of NIOS / II development
kit to start the project. You may find the price on the Altera
web-site. Besides, you may contact Altera local distributor
for further inquiries and support. |
[2005-3-15 11:44:11] |
| [问：tlyangbenq] |
NIOS II處理器中的標準外設和用戶配置外設介面有那些? |
| [答：Altera Expert] |
您可以在SOPC Builder中发现所有Altera提供的免费标准外设，如RAM，ROM，SDRAM接口，PCI，I2C，Ethernet通讯接口，Avalon总线桥等等。用户配置的外设可以随意定制，只需提供一个Avalon总线接口，和NiosII即可通信。 |
[2005-3-15 11:44:53] |
| [问：hzzhangxin] |
在一個FPGA上最多可以實現多少處理器？ |
| [答：Altera Expert] |
主要是看你用多大的FPGA,只要有资源，可以实现任意个 |
[2005-3-15 11:45:25] |
| [问：hugoshiuaa] |
Nios II處理器中有無快取記憶體?如何設定?能否提供旁路功能?如果操作? |
| [答：Altera Expert] |
Yse,您經由SOPC Builder 來設定 |
[2005-3-15 11:45:36] |
| [问：pyb] |
如何才能獲取FPGA詳細資料 |
| [答：Altera Expert] |
We has 2 product family. Cyclone II is for cost effective and Stratix
II is for performance.
Please visit the URL below to see details.
www.altera.com/cyclone2
www.altera.com/stratix2 |
[2005-3-15 11:45:39] |
| [问：champion_online] |
請問使用NIOSII，如何預估我的開發週期和開發成本？ |
| [答：Altera Expert] |
The normal development cycle is similar to MCU design. It
includes normally the coding of application, and the hardware design of
NIOS / FPGA. It usually takes around one to few months depending
on the complexity of the logic design. You are welcome to contact
Altera local distributor for further inquiries and support. |
[2005-3-15 11:45:44] |
| [问：lxmlxmlxm] |
請問quartus4.2是最新出的嗎 |
| [答：Altera Expert] |
目前是最近版本，但马上我们Quartus5.0将要推出 |
[2005-3-15 11:46:17] |
| [问：dumolin] |
cyclone里面有倍频器吗？我们公司买了一块评估板，我注意到晶振最大的只有50M，那么我可以在200MHz下运行程序吗？ |
| [答：Altera Expert] |
Cyclone器件有锁相环PLL，可以实现您所需的倍频功能。不过200MHz是否能运行得进行时序分析，看你的设计是否有这么高的FAltera
Expert。 |
[2005-3-15 11:46:29] |
| [问：greg828] |
Nios II能完成多少位元的控制處理或運算?時鐘最高爲多高? |
| [答：Altera Expert] |
Nios II can process 32bit operation, Altera Expertimum operator clock is 190MHz
in stratix II.(In cyclone Altera Expert. clock is 140MHz) |
[2005-3-15 11:46:46] |
| [问：电麻烦] |
请问可以提供一些设计事例吗？ |
| [答：Altera Expert] |
Altera的网站上面有很多设计实例。如果您安装了NiosII IDE开发环境，会在您的IDE目录下有很多教程实例， 您可以参考。 |
[2005-3-15 11:48:03] |
| [问：greg828] |
一般情況下,軟核處理器的性能如速度,加密性能等是否要比硬核的差? |
| [答：Altera Expert] |
sure,but hardware need more resurce. |
[2005-3-15 11:48:23] |
| [问：m9002008] |
請問Nios II片上的PLL倍頻功能的上限是多少?能提供最高幾組時鐘?有分數分頻嗎? |
| [答：Altera Expert] |
You should mean Stratix or cyclone FPGA instead of NIOSII because NIOSII
is a soft CPU that can be implemented on Altera FPGA. You need to check
the answers on the specification of the various FPGAs. |
[2005-3-15 11:52:24] |
| [问：dumolin] |
对于双CPU公用内存，如何避免冲突？我作为一个CPU，如何知道另一个CPU已经修改了内存。 |
| [答：Altera Expert] |
还是要靠你的软件来避免冲突，设置标志等方法来实现 |
[2005-3-15 11:52:39] |
| [问：siemenwo] |
請問我用STRATIX DSP 開發版V1.3開發NIOSII 系統可以嗎？關鍵我要用板上的A/D和D/A模組，版上的A/D和D/A模組怎麼連接到我的NIOSII系統中的？謝謝！ |
| [答：Altera Expert] |
STRATIX DSP 開發版當然也可放進NIOS II,但A/D和D/A可利用HDL寫成自己的模組,再利用Create New Component
or Customer instruction或利用NIOS II GPIO來控制,但速度較慢 |
[2005-3-15 11:54:00] |
| [问：m9002008] |
在設計過程中，如何使軟體仿真最大限度地接近最終實際電路的工作情況？ |
| [答：Altera Expert] |
You need accurate behaviour libraries for the components you use. |
[2005-3-15 11:54:18] |
| [问：ty010496] |
用Altera那種FPGA能更靈活有效地設計Nios II處理器? |
| [答：Altera Expert] |
you can choose cyclon II or stratix family,
depend low cost or high performance. |
[2005-3-15 11:55:31] |
| [问：tlyangbenq] |
使用NIOSII軟核至少需要多少邏輯單元或其他資源？需要進行優化嗎?如何進行優化? |
| [答：Altera Expert] |
The economic NIOSII takes about 600LEs. After you generate your NIOSII
hardware component, you then combine it with other logics to generate
the FPGA configuration. During compilation you can optionally make optimization. |
[2005-3-15 11:57:21] |
| [问：hugoshiuaa] |
Altera的Nios II處理器核有幾種類型或型號?性能有和特點? |
| [答：Altera Expert] |
主要有三种：Economy，Standard和Fast三种，特性各不相同，性能从几十DMIPS到200多DMIPS的处理能力 |
[2005-3-15 11:58:36] |
| [问：flutter] |
NiosII的最新版本的软件平台是什么？ |
| [答：Altera Expert] |
最近版本是NIOSII1.1版 |
[2005-3-15 11:59:04] |
| [问：xiekunxian] |
軟核CPU能應對不同設計對CPU的不同要求嗎 |
| [答：Altera Expert] |
nios II is 32 bit cpu ,this is fixed.
but it can support different interface.
you can make it by youself. |
[2005-3-15 12:01:43] |
| [问：zhu2_007] |
我們開始學嵌入式系統硬體部分以前學過FPGA，介紹一下“我”為什麼要選擇Altera的產品 |
| [答：Altera Expert] |
Altera FPGAs are widely used in the world. The tools are the most powerful
and friendly, they can tremendously reduce your design cycles. |
[2005-3-15 12:06:39] |
| [问：tlyangbenq] |
設計Nois II軟核處理器和其他硬體處理器,有何不同?能容易從硬核到軟核過度嗎? |
| [答：Altera Expert] |
The softcore let you fully own the control of your design. If you use
high-level language programming, you can port your hardCPU code to NIOS
code very easily. You may want custom instruction and logic to improve
your performance and efficiency. |
[2005-3-15 12:09:32] |
| [问：ty010496] |
Nios II處理器的架構和硬體處理器有何不同?包括了那些功能塊? |
| [答：Altera Expert] |
The most special parts are custom instructions. customized cache configuration |
[2005-3-15 12:10:40] |
| [问：gaohuijob] |
與外部CPU除PCI連接外可以直接LOCAL_BUS連接嗎 |
| [答：Altera Expert] |
SOPC Builder 有提供AHB to Avalon Bus ,如果是和其他BUS 連接,User需轉成Avalon Bus再和NIOS
II 溝通 |
[2005-3-15 12:12:59] |
| [问：fwdelta] |
請問在FPGA中採用非同步邏輯需注意什麽問題? |
| [答：Altera Expert] |
時序不容易控制,建議使用同步設計. |
[2005-3-15 12:16:26] |
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